Design and Analysis of High Efficiency Operational Transconductance Amplifier

Research Article
Open access

Design and Analysis of High Efficiency Operational Transconductance Amplifier

Kit Kang 1*
  • 1 Sun Yat Sen University Zhonghuan West Road, University City, Panyu District, Guangzhou City, Guangdong Province, China    
  • *corresponding author kangk3@mail2.sysu.edu.cn
Published on 20 June 2025 | https://doi.org/10.54254/2755-2721/2025.24250
ACE Vol.168
ISSN (Print): 2755-273X
ISSN (Online): 2755-2721
ISBN (Print): 978-1-80590-205-8
ISBN (Online): 978-1-80590-206-5

Abstract

High efficiency operational transconductance amplifier is an important analog circuit designed to optimize the balance between power consumption and performance. This amplifier is suitable for mobile devices, sensor interfaces, and other low-power applications due to its high gain and low power consumption characteristics. This article provides a design for implementing a high-efficiency operational transconductance amplifier, which achieves higher gain and bandwidth on the basis of traditional common source and common gate. A recycling folded cascode amplifier with bias circuit was designed using Cadence 0.18 μm CMOS technology. The power consumption and load capacitance of the two circuits were the same and the various parameters of the two circuits were simulated and verified. Sacrificing some phase margin under small signal conditions increased the gain by 6dB, bandwidth by 1.89 times, and the speed of the operational amplifier was accelerated; The slew rate under high signal is 1.5 times faster than before, and the setup time is shorter. The CMRR and PSRR have both been improved.

Keywords:

Folded cascode amplifier, Low frequency gain, GBW, Slew rate

Kang,K. (2025). Design and Analysis of High Efficiency Operational Transconductance Amplifier. Applied and Computational Engineering,168,55-62.
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References

[1]. Wei Yushong. Research on Operational Amplifier with Secondary Miller Compensation [J]. Modern Commercial and Industrial Journal, 2019.

[2]. Min Tan and Qianneng Zhou, "A two-stage amplifier with active miller compensation," 2011 IEEE International Conference on Anti-Counterfeiting, Security and Identification, Xiamen, 2011.

[3]. Xu Yanbin. Design of High Gain CMOS Foldable Common Source Common Gate Operational Amplifier [J]. Electronic World, 2021.

[4]. Hu Yang. Design and Optimization of Folding Common Source Common Gate CMOS Operational Amplifier [D]. Hebei University, 2012.

[5]. M. Akbari, A. Javid and O. Hashemipour, "A high input dynamic range, low voltage cascode current mirror and enhanced phase-margin folded cascode amplifier, " 2014. 22nd Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, 2014.

[6]. Fan Dongdong Research and Design of CMOS High Gain Broadband Operational transconductance Amplifier [D]. Guangxi Normal University, 2016.

[7]. Shi Jianghua, Han Zhigang, Xu Pengcheng. Design Method and Application of CMOS Analog Integrated Circuit Based on gm/ID. Microcomputer and Applications, 2014.

[8]. Yang Fan, Zhang Jiahong, Liu Zutao, etc A high gain bandwidth product high slew rate operational transconductance amplifier [J] Electronic Components and Materials, 2023.

[9]. R. S. Assaad and J. Silva-Martinez, "The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier," in IEEE Journal of Solid-State Circuits, vol. 44, no. 9, pp. 2535-2542, Sept. 2009.

[10]. A.Ranjan and R. Chauhan, "An Enhancement of Recycling Folded Cascode Amplifier Using Potential Divider Method," 2022 13th International Conference on Computing Communication and Networking Technologies (ICCCNT), Kharagpur, India, 2022.

Cite this article

Kang,K. (2025). Design and Analysis of High Efficiency Operational Transconductance Amplifier. Applied and Computational Engineering,168,55-62.

Data availability

The datasets used and/or analyzed during the current study will be available from the authors upon reasonable request.

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About volume

Volume title: Proceedings of the 5th International Conference on Materials Chemistry and Environmental Engineering

ISBN：978-1-80590-205-8(Print) / 978-1-80590-206-5(Online)
Editor：Harun CELIK
Conference website: https://2025.confmcee.org/
Conference date: 17 January 2025
Series: Applied and Computational Engineering
Volume number: Vol.168
ISSN：2755-2721(Print) / 2755-273X(Online)

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References

[1]. Wei Yushong. Research on Operational Amplifier with Secondary Miller Compensation [J]. Modern Commercial and Industrial Journal, 2019.

[2]. Min Tan and Qianneng Zhou, "A two-stage amplifier with active miller compensation," 2011 IEEE International Conference on Anti-Counterfeiting, Security and Identification, Xiamen, 2011.

[3]. Xu Yanbin. Design of High Gain CMOS Foldable Common Source Common Gate Operational Amplifier [J]. Electronic World, 2021.

[4]. Hu Yang. Design and Optimization of Folding Common Source Common Gate CMOS Operational Amplifier [D]. Hebei University, 2012.

[5]. M. Akbari, A. Javid and O. Hashemipour, "A high input dynamic range, low voltage cascode current mirror and enhanced phase-margin folded cascode amplifier, " 2014. 22nd Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, 2014.

[6]. Fan Dongdong Research and Design of CMOS High Gain Broadband Operational transconductance Amplifier [D]. Guangxi Normal University, 2016.

[7]. Shi Jianghua, Han Zhigang, Xu Pengcheng. Design Method and Application of CMOS Analog Integrated Circuit Based on gm/ID. Microcomputer and Applications, 2014.

[8]. Yang Fan, Zhang Jiahong, Liu Zutao, etc A high gain bandwidth product high slew rate operational transconductance amplifier [J] Electronic Components and Materials, 2023.

[9]. R. S. Assaad and J. Silva-Martinez, "The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier," in IEEE Journal of Solid-State Circuits, vol. 44, no. 9, pp. 2535-2542, Sept. 2009.

[10]. A.Ranjan and R. Chauhan, "An Enhancement of Recycling Folded Cascode Amplifier Using Potential Divider Method," 2022 13th International Conference on Computing Communication and Networking Technologies (ICCCNT), Kharagpur, India, 2022.

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