References
[1]. P. Guerrier and A. Greiner. A generic architecture for on-chip packet-switched interconnections. In Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537), pages 250–256, 2000.
[2]. En-Jui Chang, Hsien-Kai Hsin, Chih-Hao Chao, Shu-Yen Lin, and An-Yeu Wu. Regional acobased cascaded adaptive routing for traffic balancing in mesh-based network-on-chip systems. IEEE Transactions on Computers, 64(3):868–875, 2015.
[3]. Sheng Ma, Natalie Enright Jerger, Zhiying Wang, Mingche Lai, and Libo Huang. Holistic routing algorithm design to support workload consolidation in nocs. IEEE Transactions on Computers, 63(3):529–542, 2012.
[4]. Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, and Davide Patti. Implementation and analysis of a new selection strategy for adaptive routing in networks-on-chip. IEEE transactions on computers, 57(6):809–820, 2008.
[5]. Maurizio Palesi, Rickard Holsmark, Shashi Kumar, and Vincenzo Catania. Application specific routing algorithms for networks on chip. IEEE Transactions on Parallel and Distributed Systems, 20(3):316–330, 2009.
Cite this article
Sun,Y.;Qian,X.;Qu,X. (2025). Adaptive Routing Algorithms of Network-on-Chip: A Literature Review. Applied and Computational Engineering,132,212-224.
Data availability
The datasets used and/or analyzed during the current study will be available from the authors upon reasonable request.
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References
[1]. P. Guerrier and A. Greiner. A generic architecture for on-chip packet-switched interconnections. In Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537), pages 250–256, 2000.
[2]. En-Jui Chang, Hsien-Kai Hsin, Chih-Hao Chao, Shu-Yen Lin, and An-Yeu Wu. Regional acobased cascaded adaptive routing for traffic balancing in mesh-based network-on-chip systems. IEEE Transactions on Computers, 64(3):868–875, 2015.
[3]. Sheng Ma, Natalie Enright Jerger, Zhiying Wang, Mingche Lai, and Libo Huang. Holistic routing algorithm design to support workload consolidation in nocs. IEEE Transactions on Computers, 63(3):529–542, 2012.
[4]. Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, and Davide Patti. Implementation and analysis of a new selection strategy for adaptive routing in networks-on-chip. IEEE transactions on computers, 57(6):809–820, 2008.
[5]. Maurizio Palesi, Rickard Holsmark, Shashi Kumar, and Vincenzo Catania. Application specific routing algorithms for networks on chip. IEEE Transactions on Parallel and Distributed Systems, 20(3):316–330, 2009.