Design and implementation of 4-bit absolute value detector based on verilog HDL

Zhen Li

doi:10.54254/2755-2721/19/20231031

References

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Cite this article

Li,Z. (2023). Design and implementation of 4-bit absolute value detector based on verilog HDL. Applied and Computational Engineering,19,190-196.

Data availability

The datasets used and/or analyzed during the current study will be available from the authors upon reasonable request.

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About volume

Volume title: Proceedings of the 5th International Conference on Computing and Data Science

ISBN：978-1-83558-029-5(Print) / 978-1-83558-030-1(Online)

Editor：Roman Bauer, Marwan Omar, Alan Wang

Conference website: https://2023.confcds.org/

Conference date: 14 July 2023

Series: Applied and Computational Engineering

Volume number: Vol.19

ISSN：2755-2721(Print) / 2755-273X(Online)

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