Design and implementation of UART receiving module based on FPGA

Research Article
Open access

Design and implementation of UART receiving module based on FPGA

Xiaowen Zhang 1*
  • 1 Taiyuan University of science and technology    
  • *corresponding author 202115020134@stu.tyust.edu.cn
Published on 23 October 2023 | https://doi.org/10.54254/2755-2721/14/20230768
ACE Vol.14
ISSN (Print): 2755-273X
ISSN (Online): 2755-2721
ISBN (Print): 978-1-83558-019-6
ISBN (Online): 978-1-83558-020-2

Abstract

In modern electronic systems, data transmission is an essential requirement within and between boards, or between lower and upper computers. To ensure data transmission accuracy, communication protocols are established that must be followed by all parties involved. These protocols include UART (universal asynchronous transmitter and receiver), IIC (Inter-Integrated Circuit), SPI (Serial Peripheral Interface), USB2.0/3.0(Universal Serial Bus), and Ethernet. Among these protocols, UART is the most basic one and is widely used in embedded devices due to its simple circuit structure and low cost. With the exponential growth of information technology, UART-based embedded devices can easily achieve wired and wireless communication through various communication interfaces and wireless modules. In this paper, the author presents an example of a receiving module for UART communication that converts parallel data into string data. The entire module is developed using the hardware description language Verilog HDL. Simulations are performed using ModelSim, and the results demonstrate that the simulation waveform is consistent with the expected receiving data. This approach facilitates the transformation of serial data to parallel data, improving the efficiency and accuracy of data transmission.

Keywords:

UART, communication protocol, embedded devices, Verilog HDL, Modelsim

Zhang,X. (2023). Design and implementation of UART receiving module based on FPGA. Applied and Computational Engineering,14,81-85.
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References

[1]. Gupta A K, Raman A, Kumar N, et al. Design and implementation of high-speed universal asynchronous receiver and transmitter (UART)[C]//2020 7th International Conference on Signal Processing and Integrated Networks (SPIN). IEEE, 2020: 295-300.

[2]. Kamath A, Mendez T, Ramya S, et al. Design and implementation of power-efficient fsm based uart[C]//Journal of Physics: Conference Series. IOP Publishing, 2022, 2161(1): 012052.

[3]. Kumar V, Rastogi A, Tomar V K. Implementation of UART Design for RF Modules Using Different FPGA Technologies[C]//IOP Conference Series: Materials Science and Engineering. IOP Publishing, 2021, 1116(1): 012131.

[4]. Sidek A, Saon S, Kong K W F, et al. Booth Algorithm with Implementation of UART Module using FPGA[J]. International Journal of Integrated Engineering, 2020, 12(2): 151-158.

[5]. Shrestha P, Subedi B, Girard M, et al. Wireless communication between FPGA and microcontroller[C]//2020 10th Annual Computing and Communication Workshop and Conference (CCWC). IEEE, 2020: 0402-0405.

[6]. Jemmali S, Manaï B, Hamouda M. Pure hardware design and implementation on FPGA of an EKF based accelerated SoC estimator for a lithium‐ion battery in electric vehicles[J]. IET Power Electronics, 2022, 15(11): 1004-1015.

[7]. Talapala L P, Siddaiah N, Boppana M K, et al. Implementation of the advanced encryption standard algorithm on an FPGA for image processing through the universal asynchronous receiver-transmitter protocol[J]. International Journal of Electrical and Computer Engineering, 2022, 12(6): 6114.

[8]. Prasanna T L, Siddaiah N, Krishna B M, et al. Implementation of the advanced encryption standard algorithm on an FPGA for image processing through the universal asynchronous receiver-transmitter protocol[J]. International Journal of Electrical & Computer Engineering (2088-8708), 2022, 12(6).

[9]. Gao Z, Zhou B, Li Y, et al. Design and implementation of an on-chip low-power and high-flexibility system for data acquisition and processing of an inertial measurement unit[J]. Sensors, 2020, 20(2): 462.

[10]. Badiganti P K, Peddirsi S, Rupesh A T J, et al. Design and Implementation of Smart Healthcare Monitoring System Using FPGA[C]//Proceedings of First International Conference on Computational Electronics for Wireless Communications: ICCWC 2021. Springer Singapore, 2022: 205-213.

Cite this article

Zhang,X. (2023). Design and implementation of UART receiving module based on FPGA. Applied and Computational Engineering,14,81-85.

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The datasets used and/or analyzed during the current study will be available from the authors upon reasonable request.

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About volume

Volume title: Proceedings of the 5th International Conference on Computing and Data Science

ISBN：978-1-83558-019-6(Print) / 978-1-83558-020-2(Online)
Editor：Alan Wang, Marwan Omar, Roman Bauer
Conference website: https://2023.confcds.org/
Conference date: 14 July 2023
Series: Applied and Computational Engineering
Volume number: Vol.14
ISSN：2755-2721(Print) / 2755-273X(Online)

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References

[1]. Gupta A K, Raman A, Kumar N, et al. Design and implementation of high-speed universal asynchronous receiver and transmitter (UART)[C]//2020 7th International Conference on Signal Processing and Integrated Networks (SPIN). IEEE, 2020: 295-300.

[2]. Kamath A, Mendez T, Ramya S, et al. Design and implementation of power-efficient fsm based uart[C]//Journal of Physics: Conference Series. IOP Publishing, 2022, 2161(1): 012052.

[3]. Kumar V, Rastogi A, Tomar V K. Implementation of UART Design for RF Modules Using Different FPGA Technologies[C]//IOP Conference Series: Materials Science and Engineering. IOP Publishing, 2021, 1116(1): 012131.

[4]. Sidek A, Saon S, Kong K W F, et al. Booth Algorithm with Implementation of UART Module using FPGA[J]. International Journal of Integrated Engineering, 2020, 12(2): 151-158.

[5]. Shrestha P, Subedi B, Girard M, et al. Wireless communication between FPGA and microcontroller[C]//2020 10th Annual Computing and Communication Workshop and Conference (CCWC). IEEE, 2020: 0402-0405.

[6]. Jemmali S, Manaï B, Hamouda M. Pure hardware design and implementation on FPGA of an EKF based accelerated SoC estimator for a lithium‐ion battery in electric vehicles[J]. IET Power Electronics, 2022, 15(11): 1004-1015.

[7]. Talapala L P, Siddaiah N, Boppana M K, et al. Implementation of the advanced encryption standard algorithm on an FPGA for image processing through the universal asynchronous receiver-transmitter protocol[J]. International Journal of Electrical and Computer Engineering, 2022, 12(6): 6114.

[8]. Prasanna T L, Siddaiah N, Krishna B M, et al. Implementation of the advanced encryption standard algorithm on an FPGA for image processing through the universal asynchronous receiver-transmitter protocol[J]. International Journal of Electrical & Computer Engineering (2088-8708), 2022, 12(6).

[9]. Gao Z, Zhou B, Li Y, et al. Design and implementation of an on-chip low-power and high-flexibility system for data acquisition and processing of an inertial measurement unit[J]. Sensors, 2020, 20(2): 462.

[10]. Badiganti P K, Peddirsi S, Rupesh A T J, et al. Design and Implementation of Smart Healthcare Monitoring System Using FPGA[C]//Proceedings of First International Conference on Computational Electronics for Wireless Communications: ICCWC 2021. Springer Singapore, 2022: 205-213.

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