A review on multiple-valued logic circuits

Research Article
Open access

A review on multiple-valued logic circuits

Chen Jin 1*
  • 1 University College London    
  • *corresponding author ken_j_kim@outlook.com
Published on 26 February 2024 | https://doi.org/10.54254/2755-2721/43/20230857
ACE Vol.43
ISSN (Print): 2755-273X
ISSN (Online): 2755-2721
ISBN (Print): 978-1-83558-311-1
ISBN (Online): 978-1-83558-312-8

Abstract

Since the traditional binary logic has several disadvantages including inaccuracy, high complexity, and limited applications. Multiple-Valued Logic (MVL), which can store more information in one digit than binary logics, require less number of logic gates and take the third value in practical logic problems, is developed and introduced. More information stored per digit leads to higher computational efficiency. Less logic gates results in more spaces on the circuit board. Considering the third value means higher accuracy. In this research, some examples of different MVL circuit are designed to give a rough picture of current research in this domain. These designs are based on ternary and quaternary logics rather than binary logics. Besides, reliability evaluation through mathematical approach is presented in order to prove that the new design is more preferable. This can be carried out with mathematical analysis such as calculating a matrix that reflects its reliability, and simulating different designs to obtain certain values and comparing them with each other. Despite facing various challenges, including complicated physical implementation and difficulty to modulate the signals. This means that there is still potential of further research in this domain of logic circuits. This result in the conclusion that the MVL logic circuits will replace the conventional binary logic circuits in the future, and probably that decimal logic would be developed and no binary-to-decimal conversion unit will be required.

Keywords:

Multiple-Values Logic, Electronics, Computer Science

Jin,C. (2024). A review on multiple-valued logic circuits. Applied and Computational Engineering,43,322-326.
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References

[1]. Łukasiewicz, J. (1920). O Logice trójwartościowej, Ruch Filozoficzny, vol. 5, pp. 170–171.

[2]. E. L. Post, (1920). Introduction to a general theory of elementary propositions, Am. J. Math., vol. 43, pp. 163–185.

[3]. Bernstein, B. A. (1928). Modular representation of finite algebras, in Congr. Math., vol. 1, pp. 207–216.

[4]. Gaudet, V. (2016). A survey and tutorial on contemporary aspects of multiple-valued logic and its application to microelectronic circuits. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 6(1), 5–12. https://doi.org/10.1109/jetcas.2016.2528041

[5]. Babu, H. H., Islam, R., Ali, A. A., & Akon, M. M. S. (2003). A technique for logic design of voltage-mode pass transistor based multi-valued multiple-output logic circuits. 33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings. https://doi.org/10.1109/ismvl.2003.1201393

[6]. Rosenmann, A. (2016). A multiple-valued logic approach to the design and verification of hardware circuits. Journal of Applied Logic, 15, 69–93. https://doi.org/10.1016/j.jal.2016.01.001

[7]. Jaber, R. A., Nimri, L., & Haidar, A. M. (2022). Multiple-Valued Logic Circuit Design and Data Transmission Intended for Embedded Systems. arXiv preprint arXiv:2211.04542.

[8]. Abbasinasab, A., & Yanushkevich, S. N. (2012). Reliability evaluation of multivalued logic circuits via probabilistic transfer matrices. 2012 25th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE). https://doi.org/10.1109/ccece.2012.6334965

[9]. Liang, J., Chen, L., Han, J., & Lombardi, F. (2014). Design and evaluation of multiple valued logic gates using pseudo N-type carbon nanotube fets. IEEE Transactions on Nanotechnology, 13(4), 695–708. https://doi.org/10.1109/tnano.2014.2316000

[10]. Moraga, C., Trillas, E., & Guadarrama, S. (2004). Multiple-valued logic and artificial intelligence fundamentals of Fuzzy Control Revisited. Artificial Intelligence in Logic Design, 9–37. https://doi.org/10.1007/978-1-4020-2075-9_2

[11]. Bykovsky, A. Yu. (2020). Heterogeneous network architecture for integration of AI and quantum optics by means of multiple-valued logic. Quantum Reports, 2(1), 126–165. https://doi.org/10.3390/quantum2010010

[12]. Bykovsky, A. Yu. (2021). Multiple-valued logic and neural network in the position-based cryptography scheme. Journal of Russian Laser Research, 42(5), 618–630. https://doi.org/10.1007/s10946-021-10000-7

[13]. Shmerko, P., Yanushkevich, S., Perkowski, M., Iwashita, Y., & Stoica, A. (2023). Discovering emerging applications of multi-valued logic: Protocols for human-autonomy teaming. 2023 IEEE 53rd International Symposium on Multiple-Valued Logic (ISMVL). https://doi.org/10.1109/ismvl57333.2023.00047

Cite this article

Jin,C. (2024). A review on multiple-valued logic circuits. Applied and Computational Engineering,43,322-326.

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About volume

Volume title: Proceedings of the 2023 International Conference on Machine Learning and Automation

ISBN：978-1-83558-311-1(Print) / 978-1-83558-312-8(Online)
Editor：Mustafa İSTANBULLU
Conference website: https://2023.confmla.org/
Conference date: 18 October 2023
Series: Applied and Computational Engineering
Volume number: Vol.43
ISSN：2755-2721(Print) / 2755-273X(Online)

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References

[1]. Łukasiewicz, J. (1920). O Logice trójwartościowej, Ruch Filozoficzny, vol. 5, pp. 170–171.

[2]. E. L. Post, (1920). Introduction to a general theory of elementary propositions, Am. J. Math., vol. 43, pp. 163–185.

[3]. Bernstein, B. A. (1928). Modular representation of finite algebras, in Congr. Math., vol. 1, pp. 207–216.

[4]. Gaudet, V. (2016). A survey and tutorial on contemporary aspects of multiple-valued logic and its application to microelectronic circuits. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 6(1), 5–12. https://doi.org/10.1109/jetcas.2016.2528041

[5]. Babu, H. H., Islam, R., Ali, A. A., & Akon, M. M. S. (2003). A technique for logic design of voltage-mode pass transistor based multi-valued multiple-output logic circuits. 33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings. https://doi.org/10.1109/ismvl.2003.1201393

[6]. Rosenmann, A. (2016). A multiple-valued logic approach to the design and verification of hardware circuits. Journal of Applied Logic, 15, 69–93. https://doi.org/10.1016/j.jal.2016.01.001

[7]. Jaber, R. A., Nimri, L., & Haidar, A. M. (2022). Multiple-Valued Logic Circuit Design and Data Transmission Intended for Embedded Systems. arXiv preprint arXiv:2211.04542.

[8]. Abbasinasab, A., & Yanushkevich, S. N. (2012). Reliability evaluation of multivalued logic circuits via probabilistic transfer matrices. 2012 25th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE). https://doi.org/10.1109/ccece.2012.6334965

[9]. Liang, J., Chen, L., Han, J., & Lombardi, F. (2014). Design and evaluation of multiple valued logic gates using pseudo N-type carbon nanotube fets. IEEE Transactions on Nanotechnology, 13(4), 695–708. https://doi.org/10.1109/tnano.2014.2316000

[10]. Moraga, C., Trillas, E., & Guadarrama, S. (2004). Multiple-valued logic and artificial intelligence fundamentals of Fuzzy Control Revisited. Artificial Intelligence in Logic Design, 9–37. https://doi.org/10.1007/978-1-4020-2075-9_2

[11]. Bykovsky, A. Yu. (2020). Heterogeneous network architecture for integration of AI and quantum optics by means of multiple-valued logic. Quantum Reports, 2(1), 126–165. https://doi.org/10.3390/quantum2010010

[12]. Bykovsky, A. Yu. (2021). Multiple-valued logic and neural network in the position-based cryptography scheme. Journal of Russian Laser Research, 42(5), 618–630. https://doi.org/10.1007/s10946-021-10000-7

[13]. Shmerko, P., Yanushkevich, S., Perkowski, M., Iwashita, Y., & Stoica, A. (2023). Discovering emerging applications of multi-valued logic: Protocols for human-autonomy teaming. 2023 IEEE 53rd International Symposium on Multiple-Valued Logic (ISMVL). https://doi.org/10.1109/ismvl57333.2023.00047

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