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Verilog-based digital clock design methodology
- 1 Xidian University
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Abstract
A digital electronic clock is a sophisticated instrument that employs digital circuits to render the time—hours, minutes, and seconds—in a digital format. This paper delves into the intricate design journey of creating a basic digital clock using the powerful Verilog HDL paired with a seven-segment digital tube. The core objective revolves around the realization of the clock’s essential features, emphasizing both timing mechanics and its visual display. The architecture of the digital clock circuit is a seamless integration of three pivotal modules: the frequency divider, which ensures accurate time intervals; the counter, which keeps track of elapsed time; and the decoder, responsible for converting raw data into a format suitable for display. The clock’s tangible representation of time is vividly brought to life on a light-emitting diode (LED) display of the seven-segment digital tube. This setup magnificently showcases two-digit representations for hours, minutes, and seconds, streamlining the user’s experience. Rigorous simulation revealed that the system adeptly meets its operational mandate, functioning seamlessly as a digital clock and thereby aligning perfectly with the stipulated design criteria.
Keywords
Verilog HDL, Digital clock, Frequency Divider, Counter, Decoder
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Cite this article
Wang,Y. (2023). Verilog-based digital clock design methodology. Theoretical and Natural Science,14,102-107.
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The datasets used and/or analyzed during the current study will be available from the authors upon reasonable request.
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Volume title: Proceedings of the 3rd International Conference on Computing Innovation and Applied Physics
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